CS 14 -- Lab 6(A)

We begin the designing our own processors! Working in pairs, you will design your own instruction set and then a CPU to support it. This week, you will begin to lay the groundwork...

Designing an ISA

Notice that the MIPS instruction set dictates some aspects of how a datapath and control can be built to implement. Thus, it is really refered to as an instruction set architecture (ISA), defining the available operations, the machine code format for each instruction, the number of available registers, etc.

Your first task is to design your own ISA, knowing that later you will build a processor to implement it. In order to design your ISA, there are a number of important considerations:

• Word size: You should use 8-bit words. 4-bit words would be too restrictive, and 16-bit ones would require way too many wires.

• Number of registers: There should be at least 3 registers (so that one instruction can specify two source and one destination register), but I would not recommend more than 8 (too many wires and chips). Using more registers requires some more wiring, but it also makes programming easier.

• Instruction length: You will likely find that single-word instructions are too small, and that an instruction will need to be two or more words long. For example, consider something like an R-type instruction where you must specify an opcode and three registers -- would those bits fit into a single word? Also consider that for some instructions, you will need to have space for some kind of immediate value. How many bits will be used to represent those immediate values, and what does that choice imply for the range of those values?

• Instruction format: Of course the main work in creating an ISA is determining what bits go where and for which opcodes. You must fully specify the bit layout for the machine code representation of each possible instruction.

Be sure, as you make choices for these (and likely other) issues that you keep in mind how your datapath will be constructed. With a carefully considered ISA design, you will find it easier to connect and control the CPU components.

Operations

So which operations should your CPU be able to perform? Below there are two lists: the first specifies the operations that your CPU must support, and the second specifies those that you may optionally add to your ISA.

Required operations

• Arithmetic/logical:

  • Add two register values
  • Subtract one register value from another
  • Bitwise AND two register values
  • Bitwise OR two register values
  • Bitwise XOR two register values
  • Add a register value to an immediate value
  • Subtract an immediate value from a register value
  • Bitwise AND a register value and an immediate value
  • Bitwise OR a register value and an immediate value
  • Bitwise XOR a register value and an immediate value
  
  

• Branching:

  • Unconditionally branch (jump) to an immediately specified target
  • Unconditionally branch (jump) to a target contained in a register
  • Conditionally branch to an immediately specified target if two register values are equal
  • Conditionally branch to an immediately specified target if two register values are not equal
  
  

• Main memory access:

  • Copy a word from main memory into a register
  • Copy a word from a register into main memory

Optional operations

• Arithmetic/logical:

  • Multiply two register values
  • Divide one register value by another
  • Multiply one register value by an immediate value
  • Divide a register value by an immediate value
  • Shift a register's contents left by a number of bits specified in an immediate value
  • Shift a register's contents right by a number of bits specified in an immediate value
  
  

• Branching:

  • Unconditionally branch and link (store the branch source in a register before jumping)
  • Conditionally branch to an immediately specified target if one register value is less than another's
  • Conditionally branch to an immediately specified target if one register value is less or equal to another's
  • Conditionally branch to an immediately specified target if one register value is greater than another's
  • Conditionally branch to an immediately specified target if one register value is greater than or equal to another's

Other requirements and a few gotchas

When it comes time to build your processor, there are some requirements on how it must be done:

• You must use the 74LS273 (flip-flop) chips as the basis of your register file. That means creating the register file yourself, using MUX's, etc.
• You must use the EEPROM chips as your main memory. They can hold more that 8 bits per address, but you need only use 8 of the bits. Also note that with 8-bit addresses, you will have access to only 256 words of memory. That should be enough for what we're doing.
• You may use an ALU chip, or you may create your own ALU. If you do the latter, you may will choose to use the ALU chip to perform some of the operations, but not all of them.

After you design your ISA and you begin then to design your datapath and control, you are likely to want to change aspects of your ISA. You are welcome to do that. Nobody can create a good abstract specification without some experience in trying to implement it, and so I expect your ISA to change.

Also note that there are some issues that we are currently ignoring. For example, if an arithmetic operation causes an overflow, what should your processor do? For the moment, ignore such issues -- we will address them in lecture and then determine how to incorporate them into your design.

This week's goals

This week, you have the following goals:

1. Pick a partner. This project should be done in pairs.
2. Design your ISA. Specifically, you should document your ISA and submit it at the beginning of the next lab.
3. Design and create your register file. Any design will need one, and you should create one that corresponds to your ISA.
4. Begin design of your ALU and main memory. Figure out how these parts will connect to the others (including what interface will be provided for controlling them).